The present disclosure relates to a semiconductor structure, and particularly to fin field effect transistors having dielectric isolation from an underlying semiconductor layer, and methods of manufacturing the same.
A finFET is a field effect transistor including a channel located in a semiconductor fin having a height that is greater than a width. FinFETs employ vertical surfaces of semiconductor fins to effectively increase a device area without increasing the physical layout area of the device. Fin-based devices are compatible with fully depleted mode operation if the lateral width of the fin is thin enough. For these reasons, fin-based devices can be employed in advanced semiconductor chips to provide high performance devices.
A finFET formed on a semiconductor-on-insulator (SOI) substrate provides excellent electrical isolation from an underlying substrate and neighboring semiconductor devices. Stressor elements formed on a finFET on an SOI substrate do not effectively provide stress to the channel of the finFET. For example, a stressed source region or a stressed drain region formed above an insulator layer underlying the semiconductor fin is free to expand laterally, and therefore, the stress generated by the stressor element is mitigated by deformation of the stressor element. Thus, a fin field effect transistor that can effectively transmit the stress generated by a stressor element without loss is desired.